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- 游戏介绍 -
中文名称: 波波罗古罗伊斯物语 皮耶多罗王子的冒险
游戏产地: 日本
发行商: SCEI
发行日期: 2005-2-10
游戏类型: RPG
游戏人数: 1
合适春秋: 全年纪
内容写真: 包装
官方网页:
- 游戏攻略 -
第一篇【氷の魔王篇】
故事是发生在10年前古罗斯王国的国王救了插着剑受伤的白龙,也就是波波罗的母亲,这一天晚上国王做了一个10年的梦醒来跑去和王子盖被子,后离去看多年沉睡的王后给王子看到了也从窗口爬下去去看了,王子为懂得开母亲多年沉睡的原因此冒险的.
第1章:ピエトロの旅破ち
在母亲沉睡的塔里父亲给了把龙剑给王子叫王子一定要把母亲从黑暗中救出来,首先大家先存个档不升级的时候挂掉,进级到3级就到上方的タキネシ村去然后去找村上方フローネルの森里的森林魔女帮忙倡议升到6级再去比拟保险,ナルシアが加入队伍,下一个目标就是ギルダの馆这里就是王子好奇看大炮结果给大炮打到矿洞里去了,这个矿洞就不加说明了,走着走着看见一个牢房关着两个人一个是矿工和白骑士其余的就是坏人先不论它进里屋打Boss成功后成功救了白骑士和矿工上来地面,然后就是要到港口去下一个山洞就有点难自己就是在这个岩穴卡的,在村的右边有个山洞,在洞的第三层的右边*洞口在水边就可以进去了,后面也是一样,这样就回到大炮处假如过不了的请看图.
到港口里的船厂找楼上的大叔一上楼就有自动剧情,拿到设计图后,返回矿山村给电梯旁边那个工厂的大叔就行了免费到宿屋睡一觉回来就会发现东西给魔王盗还留了纸条,然后就去那个フローネルの森的右边那条路到山岳地带到魔王,这里就是魔王村先去左上边的房间叫门卫开电子门然后去有两个金做的魔王像进去后就是魔王城,这里先到右下方开电源,然后大家把所以宝箱翻开在四楼有个宝箱是门的ID有了ID就可以上5楼找魔王了,在右边有个蓝门上6楼的上面有个开关,开了以后就可以坐电梯了,在司令部找到Boss开火后魔王逃跑.我们从魔王城里逃出来后回タキネシ村看见魔王睡在田里,而且受伤了女主角给他疗伤后送还王冠给王子后回港口后找之前的大叔这次大叔在一楼,把皇冠给他叫两个工人开始功课,主角3人也帮忙造船,然后出海, 森林魔女就回她的家老魔女会给她黄金之键就可以变身,魔女不变身出海会融掉的,反正比以前美丽多了,没有那么土(我说的都是空话)接着说吧,白骑士和王子在海中迷失了方向的时候都睡觉了正在这个时候一只章鱼跑来抓王子正要拉他下水的时候,魔女变成海鸥飞来撞飞章鱼救了王子,现在三人团圆了,去到古时期的天空之城,到了以后进中间的门就有迷之声音看见黑暗四人组,这里有个迷之屋,有条狗给你讲这个城市的历史叫你去旁边的神殿找一本书必需解开封印,讲完了后就看到魔王在偷听我们和魔王都吓一跳魔王跑了,之后这里就失事了中间的封印门被打开了,狗人去看个毕竟我们先从左边进去找到魔王先见到魔王这次魔王居然加入队伍,现在就四人都齐了,进魔王后面的门,看见我们要找的魔法书给黑暗四人其中一人拿了,我们正要开打他们跑了,这时我们回到干才大门那里走右边狗人说城市的心脏暴走了我们就把他拿下了,拿下了这个天空之城也完蛋了,狗人叫我们和他一起走,出拉大门**魔王不知道跑回去干什么,我们就坐飞船走了但是这个城堡爆炸太快了把王子差点拉下幸好女主角变成飞龙就了他们,第一章完.
第2章:闇の世界ヘ
我们在フロ的手下来呈文魔王在天空之城胜利脱出,请大家去鉄の墓场坐他的新作品飞船大家坐上船后船就飞到仙人岛,到了以后魔王卖体面用遥控器来遥控结果遥控器给掉海里了,当初这里有良多好货色设备一下在走大家在这个时候应当有17级了吧,花瓣随风飘零 .匆匆地,上山找仙人,找到仙人后黑暗四人其中一人又呈现了,仙人说要给我们去黑暗王国去找母亲,上了山顶后仙人开了封印后黑暗四人组都来了,三人去了黑暗王国一人和我们打Boss战结果挂掉了,仙人叫黑暗的大白鲸送我们去城堡,见了女王对话女王在流眼泪,就晓得有苦处了,说王子母亲在冰之星,我们马上坐鲸鱼去那里,这里终于看见母亲了,母亲还是给四人的三人打伤了,我们去到魔王之星的中心看见被封印的冰之魔王(这个才是真正的魔王)黑暗四人其中二人损坏封印这个时候母亲赶来想变成龙来阻拦这所有但是没有力量拉动员神力了,另外一个坏人和我们开打Boss战也挂掉了,就剩下两个人了,封印解开了封印之塔要倒塌了,我们马上逃但是逃不走掉了下去给鲸鱼救了大家,这个时候看见冰之魔王完整清醒了还有黑暗二人组和母亲划破空间走了,王子很伤心,鲸鱼带我们到黑暗王国里见女王,叫我们回地面去说那里有灾害,我们马上动身回地面但是怎么样也回不去在这个时候宫里来了一个宫女开了上地面的门,我们回到地面了后先仙人村后到渔民村但是找不到仙人那个佣人就告知我们在村上方的岩石上平川可以找到仙人,仙人叫我们马上回古罗斯王国,白骑士说了遥控器给掉海里,魔王很赌气头还在冒气,shanghai escort,神仙用了仙法送我们回古罗斯王国,我们回去的时候看见河里都结冰了,这个不必说就是冰之魔王干的,第二章完.
第3章:白ぃ大地
故事又说10年前的就是王子没有出身的时候再说一遍,还弥补了冰之魔王来打古罗斯王国的时候女王还禁止过一次,后来王子诞生不久女
问题3就是要发生了王子送设计图到矿山村里做了皇冠第二天去取的时候一定要看魔王留下的战书不看是没有剧情发生的产生了出工厂的时候会叫你等一下,现在去就能坐铁之废墟的电梯了
问题4:是下面是ffzuimeili供给的
楼主!帮你补充一下!
从矿山有条小道可以直接到穿厂!就走那条铁轨!不知道大家发现没发明!
还有设计图交完后!睡完教一定得看魔王留的那张小条!要不不能进魔王城!
第二篇【闇の狮子王篇】
第1章:王位继承の典礼
早上上课了可我不见王子在上课,丞相去王子房间找也没有到,其实王子是跑到城下村的兵器屋顶吹口琴去了给丞相找到了叫王子到王室大厅去,王子下来后回到大厅感到氛围不是很对,你们知道吧国王要王子带两个随从去魔女森林试练其实是叫他们监视王子,搞王位继承典礼吧,来到魔女的家两个随从给魔法召唤出来的怪物吓跑了,然后回来开克服了后婆婆下来女主角下来了但是婆婆说了外面爆冷到有什么事到屋里喝点热的再说吧,两个随从说明了来意然后女主角带王子来到王家の洞窟开始试练.
在这个洞里可以多升多少级到了最里面就可以拿到知惠の王冠可以看见岩の狮子王和你讲了许多东西后说这个王冠本当の王の宝原来就你们王家的法宝然后回到魔女的家里见到随从和随从一起回到王城,王子进门就说我要一个人进去,进去后王子正式继续了王位,然后王子睡觉的时候回忆起在王家の洞窟的事件,第一章完.
第2章:女神の策略
继承了王位的波波罗王子愉快的回到城堡看母亲这个时候国王度来度去正在这个时候王子的弟弟出生了名字大家来取,国王给一个女性的声音:勇者狮子王用魔法捆住了,等恢复回来的时候国王变成怪物说我的名字叫狮子王黑暗的力气中复活了,把王后辈弟往一边丢幸亏给王子接着才没有受伤,变成闇の狮子王的父亲拿出了刀面对王子,突然国王恢复了一点意识然后跑了,然后王子到城下村女主角在那里等你,那两个随从跑来说要一起锻炼,(不是一起去锤炼是来做点灯泡),下一个目标是魔女家里,到了魔女的家和婆婆说明了这一切婆婆说大体是这样的国王给闇の狮子王把持了,这是废话吗,我不告诉你你怎么知道*,下一个目标是新魔王城位于矿山村右下方的,到了城堡里面那两个随从享受同样的待遇给魔王的机器人吓到真的跑了,开BOSS战胜了,魔王从天而降说到王子你又来搞破坏了,一看女主角来了太兴奋了把王子撞开了跑到女主角那里跪下两个眼睛好酷啊样子是一见倾心了喜欢女主角(一只巴掌拍不响的傻子)请大家看电视(真是傻的到家了)女主角基本就看他一眼肯定就是爱好王子拉,下一个目标是老魔王城,这里的敌人都很强啊经验都在1200-1500大家好好在这里升升级啊,我目前的级别是34级这里敌人秒杀的强吧,到了老魔王城进到以前那个要认证的电脑屏幕那里魔王就说等一下他输入一下没有反映踹它一脚就行了声纹-OK 体形-OK 人物-OK 门就开了是去找一个盒子,有了盒子就回新魔王城修飞船,其实没有修睦,半路就坏了,(汗技术不外关啊技巧不行啊魔王还想要女主角做你老婆门都没有).幸亏给仙人给救了,又回到仙人下方渔民村现在这里的装备都很强建议买点吧,然后持续上山碰到第四个主角鬼面童子加入队伍都上山找仙人,仙人说这些事情发生都是"古代神殿の封印"给人家解除造成的,这里的敌人不怎么强.然后仙人用魔法传送我们去古代神殿附近的森林,这次去古代神殿找封印剑,走未几远看见一个人叫谜の小男在剑的四周徘徊,看我们来就放狗(真恶心),我们和狗打完闇の狮子王来到夺走了封印剑,我们这次落空了,画面转到帽子の男那里,这个声音正是把国王变成闇の狮子王的妖女,封印给闇の狮子王解开了第二章完.
第3章:陈迹の岛
王子说必定要把父王变成怪物的正凶找出来,王后就说王子长大了一定要变成和父王一样强健,母亲说了埋藏在心里12年的旧事也就是和国王相遇的情景,母亲在这里'简称龙'有一天龙要去外面的世界看看,但是去了后被士兵视为魔龙杀中了魔法剑,还是保持飞行然而飞翔未几已经飞不动了落在邻近的森林里,正在这个时候国王来了给龙疗伤,,疗完伤龙回自己的国家后国王还在等龙不忍心就回来变成人型来找国王两个人就这样相爱了.
然后到楼下大厅聚合,而后到魔女家看那个魔法井然后到港口去仍是找船厂的大叔求他再造一艘船,他许可了就我们等他一天(太快了吧一天什么概念啊照这样罗马一天就能够建成了)回宿屋睡觉去,深夜王子睡不着跑出去,女主角不释怀也跑出去看看见王子一个人在码头的地板哭大略是父王变成怪物了吧女主角不愧是女主角很关怀王子跟他并排坐,还帮王子擦眼泪(这个女主角或许当前回是王子的妻子)给王子说她很体贴人立刻脸就红了,这个时候婆婆传影像来了,和王子讲演王城到森林大变叫王子出发回来魔女家所谓的大变就是一路上的敌人变强了打逝世后每个人都有2000-2500教训包含王家の洞窟门外的树封印都给解开了,咱们不措施先回魔女的家左上方找婆婆找对策在盘算,我们一行来到王家の洞窟看见マスクの
第三篇【女神マィラ篇】
第1章:大地の竜
天界的女神为了让本人更漂亮成果变成很丑她很嫉妒国王娶了王后加了黑暗的咒骂变成闇の狮子王要国王尽忠丑恶的女神...
王成又恢复以前的安静,游戏开始又在开会,王子说要出去找女主角在这里很闷国王很活力说你现在是一国的王子之身了在开会的时候说要出去你要我为难啊,这个时候大臣大了潜伏说王子兜着你来玩的,王后发话说给王子听这个世界里也有善竜和恶竜现在要凑合的就是恶竜,开完会王子去看他妹妹,他妹妹已经这么大了,还和王子撒娇,画面切换夜晚到港口,原来谜の小男和帽子の男正在商谈下一步的作战,看见白骑士的头真硬啊连山洞的石头都能撞碎强铁头功,下一个目标是港口的坑道,王子从王城出来到城下村有看见那两个胆下的白痴随从又说要去打恶竜王子人好先允许他们的要求加入了队伍,我想去找女主角加入队伍可那两个随从连桥都不给我过一定是国王派他们来监督我的,来到坑道里看见之前的白骑士给方才的那一撞给土埋了费了很大工夫才救出来那两个随从听得大地の竜的声音后都跑了,那个声音原来是大地の竜在叼着谜の小男小男用刀刺伤了大地の竜我们就要和大地の竜BOSS战了,两人开始屠竜了,大地の竜是善竜啊王子和白骑士知道做蠢事了这个竜是为了保护自己蛋和我们打的认为我们要损害她的孩子,屠完大地の竜,大地の竜流下了眼泪和竜の剑发生共识断成两截,后面的蛋孵出竜仔只能带着小竜来赎罪拉其他的蛋送到魔女家给婆婆看着,大地の竜临死都是含着泪死的好冤啊王子你怎么能做这种事啊,大地の竜变成魂这个着正中了谜の小男的*计,王子和白骑士成了功臣了,小竜带大家去マソセル地方现在要去的地方是温泉洞窟到了温泉洞窟里看见谜の小男在迫害老竜神叫老竜王带它去竜の国的善竜给她们上狗环我真的想K死那个小男开BOSS战对方不力跑了终于救了老竜王真心的激动了老竜王带我们去竜の国坐他背上,到了竜の国下一个目标是老竜神の城见到了老竜神说明了来意,说了意外错杀了大地の竜,什么你们把竜杀了我们就有点怕了,王子和白骑士都在相互否认是我杀的,王子说了我乐意偿命,大伙都在为王子求情,正在这个时候大地の竜的儿子看见大地の竜的灵魂在老竜神の城上空彷徨,大地の竜知道不是王子的错误是天界の女神的阴谋,谅解了王子和白骑士但是王子的心坎很内疚,老竜神发话了既然大地の竜原谅了你们了我就不查究了,实在大地の竜是老竜神的女儿,老竜神为了要为女儿报复去打天界の女神把竜の剑修复了,这次回去就王子和女主角坐老竜王的背上回去,白骑士和小竜留下,画面切换到婆婆那里众多的小竜出生了,让婆婆忙死了,第一章完.
第2章:封印の石版
一开端帽子の男跑到古罗斯城堡的城下村来搞魔法表演来了给了王子一张双人的马戏团的门票后就走,现在城下村下面森林处已经多了一个马戏团也是现在要去的目的,到了马戏团后团长部署了一个两人座这个时候两个人都酡颜很为难,在这场表演里里面的动物都不是很听团长的话,当然了团长不什么好东西也不是好人是丑陋的女神的手下,看完表演后王子和女主角出来外面看流星后终于看到女主角KISS王子了很好的开始啊,王子回首一看女主角很不好意思的用魔法做扫把飞走了,回到王宫王子就休息了妹妹说睡不着要和哥哥一起睡王子就和她一起到了半夜马戏团吹迷曲一夜之间所以的小孩包括王子的妹妹都给马戏团的迷曲拐跑了,第二天所以的市民都到王宫来说孩子失落了,正在这个时候士兵来报告昨天在城下村下面的马戏团消散了,国王说怎么会呢这么大的马戏团怎么消逝了,市民都找国王要国王评个理,王子说我去把他们找回来就跑出去了在城堡到城下的桥那里看见婆婆和女主角都赶来了女主角给了王子妹妹的玩具说是在半路捡到的,从这里就知道马戏团确定迁徙了,王子正要走女主角不知道何事好跑会婆婆那里婆婆给女主角黄金の键便利她变身,我们先去港口看看,在港口的人们说那个马戏团的人去了ロマ-ナ地方北位于港口船厂北边出口处,到ロマ-ナ城去了,刚走不久看见鬼面童子参加步队,到了海边女主角说要变身叫我们转过身去,看女主角的表情怪不好心思,我们男的都转从前了她才变身,到ロマ-ナ城见国王去阐明情形,最近国王很头痛钢铁魔王来搞破坏钢铁魔王城在ポしポし村四周属于ロマ-ナ处所南,估量就是错误魔王干的国王空想钢铁魔王把ロマ-ナ公主给五花大绑或者是火烤,我到了钢铁魔王城后才知道这个ロマ-ナ公主比魔王还魔王和机器人打架的,这个魔王城太大了花了我两个多小时才走到底,要打两个BOSS第一个是维护ロマ-ナ公主的3 2 1家臣,后一个是魔王自己逞强卖关子,魔王真有钱做了一个城堡又一座,座座都搞主动覆灭,终于把公主拯救会ロマ-ナ城见到国王,国王想拥抱一下都不行,从头上跳过真是个顽皮的公主,古罗斯王国的跟从跑来ロマ-ナ城找王子,真不是时候正在和女主角谈情的时候来真是的,而且那两个侍从太只觉了一来就跑上床睡觉去王子和女主角都在笑他们,第二天早上和国王作别
第4章:闇の目觉め
女主角回到婆婆那里安养,婆婆说女主角的历史了,一天早上忽然有风婆婆跑出去看了从天空降下一个光球这个恰是女主角她头上有两个光头是婆婆哄着她长大的她还不知道她的生世要大家保密,完后大家出发回古罗斯城堡,刚从森林出来小恭闻声动物说找不到新家要小恭帮忙小恭自行离队,回到城堡ロマ-ナ公主的母亲来了要她回去,现在守护最后的石版的担子就落在王子和白骑士身上了,回到王宫和父王和母后解释了要守护竜の国的最后的石版后上楼休息去了突然丑陋的女神跑到王子的床边还捉住了王子,抓走了母亲,国王快接收不了,正在这个时候女主角归队了,在城堡下的桥那里白骑士吹了口哨唤来了老竜王,带我们去竜の国到以后事情已经发生了,母亲死了,beijing escort,王子很懊丧说了世界的消亡关我什么事只有母亲能活过来就行给女主角上了一个巴掌,女主角发话世界的和平在我们身上我爱这个世界,王子这个时候从苦楚中知道下来要做的事多着呢,丑陋的女神带走最后的石版,然后叫老竜王带我们去コトリコ岛在救国王也就是大闇の狮子王的地方,看到所有的石版都装到卡座里了我们毫无方法然后丑陋的女神消失了神殿倒塌魔神出鞘,beijing massage,最后的BOSS巴巴魔神回生了,在众神用尽全力给众神给灭了,神先把我们送回古罗斯王国的城堡,告诉国王皇后阵亡国王差点就晕死过去了给几位大臣扶着上座的,现在就是到港口坐观光船到水の神殿遗迹去找一本发光的书BOSS战后小竜就有一招招呼水魔法魔女森林下面的村落右边的山崖有个找发光的地方BOSS战后小竜就有一招召唤剑魔法,在ロマ-ナ的城堡里左边二楼有个发光的独角兽BOSS战后就有一招号召独角兽魔法,小竜一开始是没有魔法召唤的,下一个目标就是しムリァ大陆的マィラ神殿,现在要做的事就是去港口坐火车,到了车站卖票的说铁路有故障对方的车过不来,shanghai massage,我们回古罗斯王宫换人把女主角换走她没有黄金の键了变不了身只能等铁路修复好了在换回来,到了港口的上方的海边的上面有个楼梯外面是铁丝围着以前是不能来的现在门开了,上去后往港口的方向走打猴子BOSS战这个猴子有点强打完了后有猴子抬走,到了猴子窝马上给猴子团团的围起来并把我们抓起来,本来猴子有两派一派是善派一派是恶派,善派把我们救了出来我们去打恶派见到猴王BOSS战打完后竜の剑加强最强但是猴王就死了,然后回古罗斯王宫把女主角换回来然后去ロマ-ナ找公主,公主因为早恋给母亲罚先是小书后来是超大的书压得她跑到浴室的角落去偷哭,何必当初呢.大家一定要知道现在是要找齐所有同伴的时候了也就是总攻到来了,ロマ-ナ公主在最左边的上方藏书楼的地下室里,然后是在王宫中庭的温室内在找一次又跑了在城堡的进口,我*找你找了好苦啊都是大臣告诉我的搞什么特训,天哪看来她很怕她母亲啊母亲一来就想尽办法逃跑,她母亲请求很高啊要舞踏和武鬪的基础姿态给一本天书压着她的头,然后丢下那本天书后叫她跳跳得很高啊,她叫我们先回古罗斯王城等下她就来,先坐火车回去港口先再回王宫,在世界散落的搭档请他们归队行,在海洋上用道具的最后一个的第一个东西,就是第二篇的第一章吹的口琴就可以呼唤老竜王来做交通工具了,在天空飞的时候选舆图的时候可以看见???先去这里其中一个是日の国救鬼面童子先去找主公拿通行牌就所有地方都能走了,然后去哨所坐船到竜岛去打BOSS打完后在BOSS后面找到超级发条拿会去给主公他会给你钥匙给你去救鬼面童子的,然后去フンババ村(封印の剑那个岛)到迷宫找魔王就人齐了,至于小竜的召唤魔法ポポロクロイス城城堡里没有找到大家来找到时来补漏吧,来到レムリア大陆进到里面好多增强的补品啊和宝箱大家纵情的拿吧,到里最里面我们就给一个阵分成一个独自举动如果等级不够的话就打得很苦了,然后大家合并了就好打多了,先和那个什么都变的谜の小男BOSS战打打胜利后还是逃跑回丑陋の女神那里还是给女神给杀了,王子问她为什么要杀你的同伴,她*笑的说它们不是我的同伴我只当它们是道具,道具?真没有人道,开始BOSS战,第一形态停止,打完落后她的体内作战打她的私心,另外两种状态最后那个形态比较难打,提议大家蓄力后再打,先容后大家都传递出去了,王子还要去灭绝封印の塔还有女主角鲁西亚但是到最后自毁体系开启后门都给关了海上灌进来还是没有掩护好女主角还是给海水变成泡泡真是很掺啊王子一下子就失去了两个人一个是母亲一个是自己的恋人苦死了,波波罗王子我都替你觉得难过啊.,然后大神说要把在这次死去冤死的人们和对这个世界有奉献的人复活.第四章完.
エビロー 大切なここる
醒来后大家告诉王子在海边找到王子的然后开感激报答大家的宴席,然后去精灵泉那里,女主角鲁西亚正在那里等着王子现在才是我心里想要的大团聚人人都键在.后面的就自己看吧不写了写出来就没有意思了恋情的东西要自己看懂吗.

1 Active Area Active Area (workspace) active transistor (ACTIVE TRANSISTOR) is manufactured by the so-called active zone area (ACTIVE AREA). In standard MOS manufacturing process ACTIVE AREA layer of silicon nitride mask that is so then After etching silicon nitride oxide formed by localized field area, and due to the local field oxide using the steps, so the ACTIVE AREA will be the beak (BIRDrS BEAK) the impact of the silicon nitride mask over the original area defined by to the small, in the long 0.6UM the field area in terms of oxidation, is likely to be 0.5UM of BIRDrS BEAK existence, that is ACTIVE AREA silicon nitride mask than the original in the area defined by a small 0.5UM.
2 ACTONE acetone 1 acetone is an organic solvent, molecular formula CH3COCH3.2. nature is a colorless, pungent with the smell of mint and liquid .3 in use within the FAB, mainly in the yellow interior positive photoresist cleaning, wipe .4. on the nerve center of a moderate anesthesia, with minimal toxicity to the skin and mucous membranes, prolonged contact may cause dermatitis, excessive inhalation of acetone vapor can irritate the nose, eye and throat mucous membrane, and even cause headaches, nausea, vomiting, dizziness, unconsciousness and other unknown .5 allowable concentration 1000PPM.
3 ADI imaging examination after 1 Definition: After Developing Inspection of the abbreviation 2 Objective: Check the photolithography process; photoresist exposure covering r r r aligned autoradiography. found weaknesses, such as poor coverage, imaging and other adverse verdict, modify h to maintain product yield, quality .3 Methods: Using visual inspection, microscopy whom.
4 AEI etch inspection after 1 Definitions: AEI is After Etching Inspection, removal of the photoresist etching process to remove photoresist before and after the implementation of all the products were seized, or random checks .2, aims to improve product yield :2-1, to avoid the outflow of defective products. 2 - 2 to achieve consistency of quality and process repeatability .2-3 show the process capability of the pointer 2-4 to prevent abnormal expansion, cost 3 checks out of the AEI is usually bad product, with little amend non-essential, because the weight to oxide or heavy long-oxide reliability may result in deterioration of the component characteristics change, shortcomings density, increased production costs, and reduce the yield disadvantage.
5 AIR SHOWER welcome home room air before entering the clean room, no need to wear dust clothes, because outside the locker room, therefore, to clean the dust on the stained clothes, into the clean room before it is required by air spraying machine will blow dust.
6 ALIGNMENT Alignment 1 Definition: the use of chip alignment key, usually with Arrows and mask alignment on the bonding of whom .2 Purpose: In the IC manufacturing process, must be about 6 to 10 alignment, exposure to define the circuit pattern on the standard is to define the precise pattern of layers in the chip above .3 imaging Methods: A. B. Alignment of the human eye light, electricity mix instead of the human eye, that mechanical aim.
7 ALLOY / SINTER The purpose of the fusion Alloy aluminum and silicon (Silicon Substrate) of contact with Ohmic characteristics, namely, a linear relationship between voltage and current. Alloy can reduce contact resistance.
8 AL / SI aluminum / silicon target this sputtering for the metal used when using a metal alloy material free of Ar ions, the surface allowed to hit this target, the Al / Si atoms hit out, and plated on the surface of the chip, the general use of the composition of Al / Si (1%), this wire with the outside world as a connected component.
9 AL / SI / CU aluminum / silicon / copper sputtering when the name of the raw materials used, usually known as TARGET, its composition 0.5% copper, 1% silicon and 98.5% aluminum, the general process is usually 1% with 99% silicon aluminum, and later to metal charge transfer phenomena (ELEC TROMIGRATION) so infiltration plus 0.5% copper to reduce metal charge transfer.
10 ALUMINUN aluminum This is used when the metal sputtering a metal material, the use of Ar ion-free, let it hit the target surface made of such materials, the impact of Al atoms out of the plating on the surface of the chip will The wire with the outside world as a component of the connection.
11 ANGLE LAPPING angle grinding Angle Lapping Junction purpose is to measure the depth of the chip by pre-treatment, which uses light interferometric method termed Angle Lapping. formula for Xj = l / 2 NF Junction depth equal to that half of the incident light wavelength and the number of interference fringes product, but gradually reduced as the VLSI components, accuracy and precision are not in response, such as SRP (Spreading Resistance Prqbing) is applied Angle Lapping method for pre-treatment, the method used is based on the surface of implant concentration obtained with the corresponding relationship between the resistance Junction depth, accuracy is far more than the incident light interferometry.
12 ANGSTRON angstrom is a unit of length is 1 meter in size tens of billions to one, about the width of human hair from 50 parts per million. This unit commonly used in IC manufacturing process, and that the layer (such as SiO2, Poly, SiNh.) thickness with.
13 APCVD (ATMOSPRESSURE) atmospheric pressure chemical vapor deposition APCVD for the Atmosphere (air), Pressure (pressure), Chemical (chemicals), Vapor (gas) and Deposition (deposition) of the abbreviation, that is, the reaction gas (such as SiH4 (g), B2H6 (g), and O2 (g)) at atmospheric pressure from the chemical reaction and generate a solid product (such as BPSG) on the chip.
14 AS75 arsenic elements of nature a; of 33 protons and 42 neutrons that is composed of 75 electrons. semiconductor industry with arsenic ions (As +) by the decomposition of AsH3 gas. Arsenic is used as N-TYPE DOPANT N-field region, the depletion region and S / D implant.
15 ASHING, STRIPPING plasma photoresist strip 1 plasma pretreatment system using plasma method (Plasma), the chip surface of the photoresist to be removed. 2. plasma photoresist removal of the principle, the use of oxygen in the plasma system produced only in the free radical (Radical) and photoresist (organic polymers) play a role, resulting in volatile gas, pumped by the pump, to remove the photoresist The purpose of .3. plasma light group compared with the acid production rate of photoresist removal is usually slower, but if the product after ion implantation or plasma etching, the surface of the photoresist or the occurrence of carbon or graphite and other chemical effects, the entire surface of the photoresist are bad, if we resist sulfuric acid to eat,beijing escort, can not have deterioration of the resist surface to be removed, it must be the first to do by way of plasma resist removal.
16 ASSEMBLY crystal particles encapsulated in resin or ceramic material, the grain bag in which to protect the grain, cut off from the purpose of environmental pollution, and this series of processes, known as the grain size package (Assembly). package of different materials, The packaging approach is also different, almost all of the company for grain packaging resin material, manufacturing process, including: visual inspection of chip cutting r r grain on grain r r stable baking molded package (the resin properties and stability) r-cut frame, curved legs forming the foot wetting r r r stamp completed the resin as the material of the IC, usually used in consumer products such as computers, computing devices, and packaging materials for the ceramic IC, is a high degree of resistance depends on the components, typically used for missiles, rockets and other more sophisticated products.
17 BACK GRINDING backside grinding mill will use the chip on the back of thinning in order to test the package, focusing on the thickness uniformity and the back of a clean degree. generally about 6 inches thickness of the chip 20mil ~ 30 mil or so, in order to facilitate grain packaging wire, so the chip thickness to be thin to wear about 10 mil ~ 15mil .
18 BAKE, SOFT BAKE, HARD BAKE baking, soft baked, pre-bake baking (Bake): the IC chip manufacturing process, the chip as a little heat (60 ℃ ~ 250 ℃) of the oven or hot plate are described in the baking, with a different purpose, can distinguish between Microsoft roast (Soft bake) and pre-baked (Hard bake). soft-baked (Soft bake): its use in the end time is after photoresist The main purpose is to resist in order to remove the solvent evaporation, and increase the adhesion of photoresist and silicon. pre-baked (Hard bake): also known as etching before baking (pre-etch bake), the main purpose of remove water vapor, increasing photoresist adhesion, especially in the wet etching (wet etching) is more important, pre-baked length will cause over-etching is not.
19 BF2 boron fluoride. One use for doing ion implantation The ion .. BF2 + BF3 + gas crystal by heating the filament broken down into: B10, B11, F19, B10F2, B11F2. Extract out by the magnetic field analysis and mass spectrometry .. obtained a P-type ion, usually implanted for VT (gate level) and S / D implant.
20 BOAT boat Boat intent is a single crystal canoe, in the semiconductor IC manufacturing process, and often need to use a tool for chip delivery, cleaning and processing, which kinds of tools to carry the chip, which we call Boat. Boat There are two general materials, one of quartz, the other is Teflon quartz Boat used in high temperature (greater than 300 ℃) of the occasion, while Teflon Boat is used in the transmission or acid treatment of the occasion.
21 BOE BOE etching solution is buffered with NH4F HF mixture in different proportions according to .6:1 BOE etching means that the HF: NH4F = 1:6 mixture of ingredients . HF as the primary etchant, NH4F is used as a buffer. using NH4F fixed [H +] concentration, so that to maintain a certain etch rate. HF etching glass and will be any material containing silica, there is a strong corrosive to the skin sex, was accidentally spilled, the application of large amounts of water.
22 BONDING PAD pad pad - crystal using gold or aluminum wire to connect the metal layers in the crystal package (Assembly) of the process, there is a step is to together, this way, the grain in order to effectively apply the function due to the grain of the metal line width of the gap is very narrow, (about the product due to the current SIMC is micron line width or gap), and used to connect the gold wire or aluminum wire with a diameter of the current due to its ductility that the material strength requirements of the metal wiring restrictions, can do 1.0 ~ 1.3mil (25.4 ~ 33j microns) so, in this case, take twenty or thirty micron wire connected directly to the metal line spacing of only 3 microns of grain, the number of aluminum will cause the access bridge, so the grains of aluminum on the road, in the end are designed as a about 4mil square metal layer, namely the pad to use as a wiring. pad is usually re-distribution of grains on the periphery of four (when the particles encapsulated wire operation), the shape of the square, there will The first point made of round wire, are provided for identification. because for the wiring pad, on which was to be etched away the sheath, it can be clearly seen in the solder pad Sometimes large pieces of metal layers can also be seen in the grain interior rather than around it, also do not see the window line is capacitive.
23 BORON Boron is one natural element by five protons and six composed of neutrons, so atomic weight is 11. another isotope, five by five protons and neutrons are composed of atomic weight is 10 (B10). nature of these two isotopes of the ratio is 4:1, by the magnetic field mass spectrometry analysis shows a P-type ion (B 11 +), used as a field area, well area, VT and S / D implant.
24 BPSG silicide boron and phosphorus is mediated BPSG above in Poly, Metal, under the insulation can be used as upper and lower levels of use, plus boron, phosphorus, the main purpose of the Step in to return after a relatively flat, to prevent the Metal line up after sputtering, resulting in disconnection.
25 BREAKDOWN VOLTAGE PN junction reverse breakdown voltage component coupled with a negative voltage is connected and N P is connected, such as access rules for such a pass when the applied voltage below a particular value of reverse current is very small, and when the increase voltage value is larger than a specific value, the reverse current will rapidly increase, this particular value is I called the breakdown voltage (BREAKDOWN VOLTAGE) defined general I reverse P + - N junction of the reverse current when the voltage is 1UA for the breakdown voltage, the P + - N or N +-P of the back component breakdown voltage, with the N (or P) decreases with an increase of the concentration.
26 BURN IN the pre-burn test Burn in) for the reliability of a test designed to test out what that is damaged in the initial period of the product, and to be removed before shipment. burn-test approach, but the component (products) The high-temperature environment , and with the specified positive or negative DC voltage, so the grain left in the oxide layer on the outside with metal ions to the impurity ions or corrosion failure modes will be easy leaving free (Failure Mode) emerged early, to screening, excluding with rated working voltage of the rated power consumption, which in addition to addition and a simulation of the actual work of input signal, so the closer to the actual situation, are more stringent. Basically, every batch of products before shipment, are to be for one hundred percent of the pre-burn test, Dan because of its cost and delivery and other factors, some products only for the old sample (part) of the burn-in test before shipment by addition to the quality we think it sufficiently stable and sufficient level of products can also sample the way, of course, with high reliability products, are required to pass one hundred percent of the pre-burn test.
27 CAD computer-aided design CAD: Computer Aided Design Computer Aided Design, the scope of this term contains very broad, can be generally referred to all the computer as a tool and that its design; therefore not only be used in the IC design, architectural design, aircraft, hull design, may be used in the past, when the computer has not been widely used, the designer The memory must be limited, experience design, but with the so-called CAD, we have some common rules and experience into the computer, followed by the designer, change can save a lot of muddle through work, so not only dramatically improve the design accuracy, the design of the field into another new world.
28 CD MEASUREMENT Macro Test CD: Critical Dimension of the short, usually at a certain level in order to control the minimum line spacing, we will produce Graphical representation of measurement in the crystal Fang, usually placed in the crystal side of the edge of the short, long used as an important macro measurement of process indicators, can represent the lithography process control of quality. measuring the level of CD is usually more important on the line from the control of levels, such as silicon nitride, POLY,Prudential Fin, CONT, METh, etc., but now more commonly used to measure a product of graphic fonts, L-BAR, etc..
29 CH3COOH acetic acid ACETIC ACID clear, colorless liquid with a pungent odor, melting point 16.63 ℃, boiling point 118 ℃. with water, alcohol, ether solubility. combustible. glacial acetic acid is 99.8% of the purified, different from the water easy ingestion or inhalation of acetic acid Pure acetic acid has moderate toxicity, skin and tissue irritation, not harmful, to be splashed with water.
30 CHAMBER vacuum chamber, the chamber specifically refers to an enclosed space, often a special purpose: such as vacuum, gas or metal splash degree of reaction, etc. For this particular space of a variety of external or internal environment: for example, the external particles (particle), humidity and internal temperature, pressure, gas flow, particle number, etc. to control. to chip optimum reaction conditions.
31 CHANNEL channel MOS transistor when a voltage on the gate (PMOS is negative, NMOS is positive), the electronic gate or a hole under the electric field will be to attract or repel the under the gate forming an inversion layer region (Inversion Layer), which is under the P-type semiconductor into N-type Si, N-type into a P-type Si, with the source and drain, We formerly known as the inversion layer as a DIE grain a-chip (OR wafer, that is, Wafer) on the same square there are many small units, these small units and is called grain. on the same chip are the same for each grain structure, has the same function, each a grain of packaged, the dolphin can be made common in our daily lives, IC, and therefore each of the IC chip can produce a very considerable quantity, from several hundred to several thousand dollars. Similarly, If the result of negligence arising from manufacturing defects will tend to spread to hundreds of thousands of products.
33 CLT (CARRIER LIFE TIME) cut the life cycle a child, wearing a small number of children re-define the average temperature when the electrons are bound in the atomic lattice within the applied energy, electronic access to energy, from the atomic lattice bound to form a free state in the island through the current work, but the energy is gone, the electronic / electric combination of holes will vary in response to the balance of factors, factor when These carriers are excited to redress the balance by a period, called the minority carrier A. chip ion impact of pollution and contamination of the metal species concentrations of B. chip crystal defect concentration
34 CMOS complementary metal oxide semiconductor metal oxide semiconductor (MOS, METAL-OXIDE SEMICONDUCTOR) the manufacturing process and its first formed on the insulating silicon oxide film, and then deposited a layer of polycrystalline silicon (or metal) as the gate, the use of the electric field house to the gate to control the MOS switch components (conductive or non conductive.) conductive carrier in accordance with the type, MOS, can be divided into two types: NMOS (by the electronic conductivity) and PMOS (holes by the electric conductivity), while the complementary metal oxide semiconductor (CMOSCOMPLEMENTARY MOS) is a combination of the NMOS and PMOS, with power, High noise immunity, a-PARTICLE immunity good many other advantages, is very large scale integration (VLSI) of the mainstream.
35 COATING photoresist covering the photoresist to soak,shanghai massage, spray, brush terror, or rolling other methods added to the chip, called photoresist coverage currently the best method for the rotation method; rotation method but will chip in vacuum in a rotating support on the chip, plus the right amount of photoresist on the chip Central, and then began to turn the chip, the chip on the photoresist to the drain opening, it is scattered evenly on the chip. photoresist film to be uniform, and stable rotation speed must be moderate, while the rotation speed and photoresist viscosity must be the photoresist coating thickness. photoresist with, the steps must be soft baked to remove excess solvent in the photoresist, thereby enabling the photoresist film is more rigid, while increasing the photoresist film and the bonding capacity of the chip The main way is that appropriate adjustments to the soft bake temperature and time after the above plating film that is soft baked photoresist process is completed the photoresist-covered steps.
36 CROSS SECTION IC fabrication is basically cross-sectional layer by layer accumulation pattern up, and in order to understand the accumulation patterns of structure, to improve the process or processes to solve problems, often the use of destructive cutting approach to the electron microscope (SEM) to observe, and cut cross-section to observe the cross cross-section approach is one of the more common of a kind.
37 CV PLOT capacitance, voltage translation means a round capacitor voltage diagram: that when the components in different circumstances, to impose on the gate of a voltage , will have different capacitance values ​​(this voltage can be positive or negative), so the component of the ideal components; that is, between the gate and drain almost no impurities in it (COMTAMINATION). When the external environment changes (temperature or pressure), and less likely to affect its capacitance value, use this to MONITOR MOS components of good or bad, generally V 38 CWQC company-wide quality control in the past some of the operators or owners, have been that quality control is the quality control department or head of the responsibility for quality control, quality control experience to do well, that is immediately accused the quality manager, it is not right. quality control is not a quality department or unit can do, and the whole company all staff are involved in each sector can do. solid quality control to achieve the purpose of business, must be combined with all the staff of all departments within the company work together, can form a common understanding, but also in the implementation of the system, and to standardize the work ,shanghai escort, and so does the set implementation of a variety of matters, so that from the market survey, research, development, design, procurement, construction, inspection, testing, shipping, sales, service quality at every stage until management can be effective, this the so-called company-wide quality control (Company Wide Quality Control). The main purpose of the implementation of CWQC is to improve its structure; that found physical problems, attention to physical fitness program, the focus point of the body, attention to the process of constitution, and all members of a system-oriented constitution.
39 CYCLE TIME cycle time refers to the raw materials from the production line to produce the desired product in the line of production / manufacturing time in the TI-ACER, the production cycle has two explanations: one is chip output cycle time required the production / manufacturing time. time now TI-ACER LINE REPORT of the production cycle time is a
40 CYCLE TIME IC manufacturing process complex production cycle, and its process is very long, since the input to the chip wafer testing is complete, that the Cycle Time. As the IC is very short life cycle, from development, production to sales, you need to quickly and able to grasp the time, so the shorter the Cycle Time, the higher competitiveness, can grasp market opportunities, will be able to maximize profits. Cycle Time as long, does not allow the production of scrap or rework the chip for some reason, it is the operation must be in accordance with specifications, and to do the troubleshooting process so that products successfully, as soon as possible the FIB sale.
41 DEFECT DENSITY shortcomings density square inch, etc.) how many , break), as long the chip manufacturing process is a complex, the fewer on-chip disadvantage, the product volume ratio the better the quality of the inevitable, the
42 DEHYDRATIO N BAKE water to baking purposes: to remove the chip surface of the water, increase resist adhesion. so as not to chip off the surface of the photoresist after exposure imaging Methods: Before the photoresist covering the use of high temperature (120 ℃ or 150 ℃ ) heating whom.
43 DENSIFY density of CVD deposition, due to the deposition of thin films (THIN FILM of the density is very low), so as to make the film in high-temperature steps in the molecular re-combination, to improve its density, this kinds of high-temperature step is known as involution. Involution usually furnace at temperatures above 800 ℃ to complete, but also in the fast heating and cooling machine (RTP; RAPID THERMAL PROCESS) to complete.
44 DESCUM plasma pretreatment 1 plasma pretreatment system using plasma method (Plasma), the chip surface of the photoresist to be removed, but to resist longer than normal plasma photoresist strip (Stripping) for short, which aims to but is due to the chip surface of the photoresist development process such as pre-bake the photoresist caused by flash or thin shavings (Scum) to be removed to make the graphics are not distorted, there will not be etched out of the pattern of residual .2. the plasma The principle of removal of photoresist, please refer to the lower etch rate is very low, making the uniformity can be increased to maintain the integrity of the graphics, to achieve the purpose of plasma pretreatment.
45 DESIGN RULE design specifications of the semiconductor process technology, the Department an are professional, sophisticated and complex technology susceptible to different methods of manufacturing equipment, processes (RECIPE) the impact, so consider how the product improvement in manufacturing technology, has successfully created, the need to do a set of standardized requirements of the relevant technology, namely ;, the system according to the needs of a variety of different products, specifications, manufacturing equipment and process methods, process capability, the relevant specifications of the electrical parameters considered, revised, such as: 1. the process level, the distance between lines, line width, etc. of the Specifications.. the process-level thickness and depth of the Specifications.. all the electrical parameters of the specifications for the product designers and process engineers,beijing massage, who's to follow, reference.
46 EDSIGN RULE design criteria design criteria EDSIGN RULE: reaction process capability and process component parameters for IC designers to reference when designing IC criteria of a complete Design Rule includes the following components: A. Process parameters: such as oxide thickness, polycrystalline metal layer thickness, and other such processes, ADI, AEI parameters are mainly two aspects of diffusion parameters with yellow. B. Electrical parameters: available to simulate the circuit designer to do a reference. C. layout parameters: and commonly known as 3mm, 2mm, 1.5mmh, etc. of the Rules, to provide a basis for the layout of the original layout. D. mask production data: provide mask to mask the company to do when the computer information, such as CD BAR, test key of the display position, relative position of all levels of the display, etc..
47 DIE BY DIE ALIGNMENT each Field of each re-FIELD are aligned prior exposure for this aim the method commonly known as a single Field; that each Field are to be aligned.
48 DIFFUSION diffusion of water in a cup of very pure point drop of ink, can be found near the water surface after the color faded, and the underwater gradually red, but color is more light, which is a diffusion an example in the semiconductor industry often in a very pure silicon chip with pre-or ion implantation methods for the diffusion source (ie red ink.) diffusion due to solid state diffusion is much slower than the liquid (about hundreds of millions of years), so as to plus high-temperature furnace tube into the way, so spread within a few hours to complete.
49 DI WATER deionized water IC manufacturing process, often need easy to use hydrochloric acid etching, cleaning chip after these steps and the need for use of water to the chip hydrochloric acid to remove residual surface, so a large amount of water, but IC. industrial water, not tap water or groundwater in general, but tap water or groundwater through a series of purification is made. The original tap water or ground water contains large amounts of bacteria, Metal ion levels PARTICLE, by the Facility will be the sterilization of equipment, filtration and purification, the metal ions and other impurities can be removed from the water that is called > 50 DOPING participation into the impurities of the components of the operation, the chip must be engaged to impurities commonly used are: 1. preset: in the furnace tube through the saturation of the impurity vapor, so that the chip surface with a high concentration of impurity layer, and then to high-temperature diffusion of impurities into the drive; or use pre-deposition at the same time. 2. ion implantation: first, to make free of impurities, and then accelerate the implanted chip.